Professor H. Ohno -- The World's Smallest Cell Implementation for a High-Density Standby-Power-Free TCAM in Combination with Silicon/Magnetic Devices --

06/11/2012

A research group of Professor Hideo Ohno, Professor Takahiro Hanyu of Center for Spintronics Integrated Systems, and Research Institute of Electrical Communication of Tohoku University and NEC Corporation (NEC) developed the world’s smallest fully parallel ternary content-addressable memory (TCAM) cell. By using a spintronics-based nonvolatile logic-in-memory circuit technique, which can compactly merge storage and logic functions into a silicon-device/spintronics-device-combined integrated circuit, the developed nonvolatile TCAM cell circuit has been miniaturized with the smallest device counts. A test chip was successfully fabricated using a 300-mm wafer fabrication line for a spin-transfer-torque (STT)-type magnetic tunnel junction (MTJ) device and a 90-nm standard silicon CMOS fabrication line in collaboration with NEC. The TCAM chip is utilized for high-speed searching hardware such as network routers, virus checkers, and databases. The success of this technology will accelerate the development of not only ultra-low-power System-on-a-Chips, which are utilized in almost all the electronic equipments as artificial intelligent controllers like a brain, but also a larger-scaled integration.

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Naoki Kasai
Center for Spintronics Integrated Systems, Tohoku University
TEL: +81-22-217-6115
E-mail: n-kasai@csis.tohoku.ac.jp